microprocessor architecture divided in The BIU has to interact with memory and of the programs and to carry out the required processing. EU & BIU. Explanation of the purpose of EU and BIU in Bus Interface Unit (BIU): The BIU interface to outside word. It provides full 16 bit. Define the jobs performed by the BIU and EU in the The functions performed by the Bus interface unit are: The BIU is responsible for the external bus.

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Programs 8068 for the can be run on the without any changes. Execution Unit This block executes the instruction. The general registers are: As mentioned, the reads 16 bits from memory by simultaneously reading an odd-addressed byte and an even-addressed byte. This is a process to speed up the processor.

Unlike SP, we can use BP to access data in the other segments. At first this might seem a disadvantage: Explain the following with examples: The EU receives program instruction codes and data from the BIU, executes these instructions, and store the results in the general registers.

The BIU must suspend fetching instructions and output the address of this memory location.

Microprocessor – 8086 Functional Units

It is used in loop instruction to store the loop counter. One other condition can cause the BIU to suspend fetching instructions. The first occurs when an instruction requires access to a memory location not in the queue. This “real” address is called the physical address.

Overall, these are used to hold the offset address of the stack address. The final group of registers is called the segment group. The BIU takes care of this problem by appending four 0’s to the low-order bits of the segment register. When EU executes instructions and is ready for its next instruction, then it simply reads the instruction from this instruction queue resulting in increased execution speed. That is, address h is Ad microrocessor the only way we earn a little money to run this blog domain fees, time for managing and posting contents etc.


The EU must wait while the instruction at the jump address is fetched.

As a programmer of the or you must become familiar with the various registers in the EU and BIU. During this execution time the BIU fetches the next instruction or instructions from memory into the instruction queue instead of remaining idle.

By passing the data back to the BIU, data can also be stored in a memory location or written to an output device. After decoding the first byte the decoding circuit decides whether the instruction is of single opcode byte or double opcode byte. It also contain 1 pointer register IP. The has a 16 bit data bus, so it can read data from or write data to memory and ports either 16 bits or 8 bits at a time. The first byte is a complete opcode in case of some instructions one byte opcode instructionsthe remaining part of opcode may lie in the second byte.

How many address lines are present in an microprocessor? In effect, this multiplies the segment register contents by A register is like a memory location where the exception is that these are denoted by name rather than numbers.

Segment Registers are used to hold the 16 bit addresses of their respective segments.


Purpose of using Instruction Queue: The queue is updated after every byte is read from the queue but the fetch cycle is entreated by BIU only if at least two bytes of the queue are empty and the EU may be concurrently executing the fetched instructions. Register IP is incremented by 1 to prepare for the next instruction fetch. 886, the answer is yes. Segment Registers and Instruction Pointer: Why can the ni only reach data in even-numbered addresses?

Architechture of

Describe the fundamental steps of digital image processing with a neat block diagram. Microprocesssor pair DX register to store bit data and also used to hold the result of bit data multiplication and division operation.

My presentations Profile Feedback Log out. There are 8 general purpose registers, i. But invariably the first byte of an instruction is an opcode. In manipulation and divisionone of the numbers involved must be in AX or AL. BIU also contain an instruction queue.

Introduction to Microprocessor – ppt video online download

BIU also contain an instruction queue. If you wish to download it, please recommend it to your friends in any social system. This is a first-in, first-out storage register sometimes likened to a “pipeline”. The code segment holds the program instruction codes.

When the first byte from the queue goes for decoding and interpretation, one byte in the queue becomes empty and subsequently the queue is up dated.